The present invention relates to methods for receiving digital audio and video processing commands from a host processor, prioritizing the commands according to programmable criteria, and executing the commands on a reduced instruction set processor.
Techniques for digital transmission of video promise increased flexibility, higher resolution, and better fidelity. Recent industry collaborations have brought digital video closer to reality; digital video transmission and storage standards have been generated, and consumer digital video products have begun to appear. The move toward digital video has been encouraged by the commercialization of digital technologies in general, such as personal computers and compact discs, both of which have increased consumer awareness of the possibilities of digital technology.
Personal computers, which have recently become common and inexpensive, contain much of the computing hardware needed to produce digital video, including a microprocessor/coprocessor for performing numeric calculations, input and output connections, and a large digital memory for storing and manipulating image data. Unfortunately, personal computers are not suitable for consumer digital video reception, because the microprocessor in a personal computer is a general purpose processor, and typically cannot perform the calculations needed for digital video fast enough to produce full-motion, high definition video output.
Accordingly, special purpose processors, particularly suited for performing digital video-related calculations, have been developed for use in digital video receivers for consumer applications. A specific processor of this kind is disclosed in commonly-assigned, copending U.S. patent application Ser. No. 08/865,749, entitled SPECIAL PURPOSE PROCESSOR FOR DIGITAL AUDIO/VIDEO DECODING, filed by Moshe Bublil et al. on May 30, 1997, which is hereby incorporated by reference herein in its entirety, and a memory controller for use therewith is disclosed in commonly-assigned, copending U.S. patent application Ser. No. 08/846,590, entitled xe2x80x9cMEMORY ADDRESS GENERATION FOR DIGITAL VIDEOxe2x80x9d, filed by Edward J. Paluch on Apr. 30, 1997, which is hereby incorporated herein in its entirety.
The above-referenced U.S. patent applications describe an application specific integrated circuit (ASIC) for performing digital video processing, which is controlled by a reduced instruction set CPU (RISC CPU). The RISC CPU controls computations and operations of other parts of the ASIC to provide digital video reception. As is typical of CPU""s of many varieties, the CPU described in the above-referenced U.S. patent applications supports flow control instructions such as BRANCH, CALL and RETURN, as well as providing hardware interrupt services.
Due to the limitations of the RISC CPU, a task and stack manager procedure is required to monitor task flags, prioritize task flags, manage subroutine calls (the hardware does not support nesting of subroutine calls), and provide virtual instruction memory management. A specific processor of this kind is disclosed in commonly-assigned, copending U.S. patent application Ser. No. 08/866,419, entitled TASK AND STACK MANAGER FOR DIGITAL VIDEO DECODING, filed by Taner Ozcelik et al. on May 30, 1997, which is hereby incorporated by reference herein in its entirety.
However, even with task and stack management, the host processor would have to be intimately integrated with the ASIC in order to command it. For example, in order for the host to command the ASIC to perform complex operations, the host would have to generate a number of specific commands and also would have to prioritize and schedule each specific command and monitor its completion before submitting the next specific command. The host would also have to become involved in synchronizing some commands with events such as during vertical blanking or over a number of video frames.
In accordance with the principles of the present invention, these difficulties are overcome by a novel method for implementing and managing an Application Programming Interface (API) with a command manager.
This command manager receives commands from the host so that the host need not wait for the command to be executed, sorts these commands so that time-critical commands are executed appropriately, schedules nonexclusive commands to the appropriate time, allowing for the prioritization of nonexclusive commands, performs macro command algorithms to allow for simplified interface with the host, provides micro command pass-through to provide an API with flexibility, and provides acknowledgment capability to the host when the command is executed.
The command manager works in coordination with a state transition handler to ensure that proper play modes are executed. The commands placed in command buffers by the command manager are routinely read by the state transition handler to execute the commands.
Specifically, in a first aspect, the invention includes increasing the speed of command execution by performing a tree search rather than a flat table lookup search. Commands are grouped into categories.
In a second aspect, the categorization of commands lends itself to modularizing the process accommodating the limited resident memory, allowing less time-critical routines to be loaded from nonresident memory.
In a third aspect, the categorization of commands allows treating commands as either exclusive or nonexclusive commands, further expediting command management by discontinuing other exclusive commands when a new exclusive command is received.
In a fourth aspect, the categorization of commands as nonexclusive provides an opportunity to schedule these events at appropriate times, including the ability to access predetermined criteria for sorting nonexclusive command execution according to application priority.
In a fifth aspect, the subcategorization of commands to a particular commands allows execution of the steps specific to the particular command, allowing macro commands that reduce the process oversight required for the host processor.
In a sixth aspect, the command manager will accept a flag bit from the host processor requesting acknowledgement when a command is completed.
In a seventh aspect, the command manager utilizes the same acknowledgement function for all commands in a particular subcategory, reducing the program size required to implement the command manager.